Recently, research group led by Professor CHENG Lin from School of Microelectronics, University of science and technology of China has made significant achievements in the field of fully integrated isolated power chip design. They proposed a chip based on glass fan-out wafer-level package (FOWLP), achieving 46.5% peak transformation efficiency and 50mW/mm2 power density.
Compared with the traditional isolated power supply chip, this new design interconnects the receiving and transmitting chips through the micro transformer made of the rewiring layer, showing no need of additional transformer chips. In this way, it lowered the need for three or even four chips in the existing chip design, so as to greatly improve the efficiency of isolated power supply.
In addition, they proposed a grid voltage control technology with variable capacitor, which maintains the grid peak voltage in the best safe voltage range even in a wider supply voltage range.
This design improves the conversion efficiency and power density of the chip effectively, providing a new solution for the design of isolated power chip in the future.
This work is published at IEEE International Solid State Circuits Conference (ISSCC), known as the Olympic Games in the field of integrated circuit design, and selected as demo demonstration at the meeting.
Photo of Isolated power system package and chip. (Image by PAN Dongfang)
Solution of the fully integrated isolated power chip in this work. (Image by PAN Dongfang)
(Written by WENG Jingwen, USTC News Center)